REMOTE Sr. ASIC Design Engineer – CPU at CyberCoders #vacancy #remote

Portland, OR Santa Clara, CA Austin, TX Boston, MA Phoenix, AZRemote Available Full-time $150,000.00 – $250,000.00Posted 05/31/2024Job Title: REMOTE Sr. ASIC Design Engineer – CPUJob Location: REMOTE – preference for Portland, OR or Vancouver (Canada)Compensation: $150K – $250K base Depending onexperience plus bonusRequirements: ASIC Design, CPU Design, Microarchitecture, RISC-V, AXI, CHI

Our company is a Founding Premier member of RISC-V International and a leading embedded processor intellectual property supplier in the world. We devote ourselves to developing high-performance/low-power 32/64 bit processors and their associated SoC platforms to serve the rapidly growing embedded system applications worldwide. With over 10 billion cumulative shipments of SoCs embedded with our CPU IP, our products cover audio, Bluetooth, gaming, GPS, machine learning, MCU and more. Our design innovation enables us to quickly adapt to the rapidly evolving demands of RISC-V customers.Top Reasons to Work with Us1) Competitive Compensation ($150K – $250K base Depending on Experience)2) Comprehensive Benefits package!

3) The chance to join a well-established supplier of embedded CPU cores!What You Will Be DoingThis role is a part of the VLSI team, which is part of our worldwide CPU development team. We are a rapidly growing organization, and you will get the chance to work with a team of experienced architects, designers and DV engineers to build next-generation of RISC-V CPUs. Ideal applicants will have a passion for technical advances, CPU architecture and have a keen interest in tackling present-day verification problems. Responsibilities include:

– Communication with peers to discuss technical details

– Competitive analysis and critique pros and cons, such as the balance of performance, area, power

– Explicit CPU hardware design ranging such as fetch units, scheduling, complex vector or floating-point maths, load-store units, coherent memory access or multi-core debug architecture

– Design quality analysis including synthesis to assess frequency, area, power quality

– Providing technical guidance to junior members of the team

– Technical documentationWhat You Need for this PositionMust have a Bachelor’s (Master’s or Ph.D. preferred) in Computer Science, Electrical Engineering, Computer Engineering, or similar with 5-10+ years of experience:

– ASIC Design

– CPU design and Microarchitecture

– RISC-V experience or similar preferred

– Experience with bus protocols such as AXI, CHI

– Verilog, System Verilog

– Synthesis, physical layout concepts, static timing analysis, clock domain crossing

– Advanced CPU architecture (multi-core coherence, FPU, DSP, interrupt, Vector, Security, Reset and CDC, Debug) and assembly languagesBenefits- Vacation/PTO- Medical- Dental- Vision- 401kSo, if you are a Sr. ASIC Design Engineer with CPU design & microarchitecture experience, please apply today! or send an updated copy of your resume to …@CyberCoders.com for immediate consideration!Colorado employees will receive paid sick leave. For additional information about available benefits, please contact Mike VandenberghApplicants must be authorized to work in the U.S.Preferred SkillsASIC DesignCPURISC-VAXICHIFloating-PointMicroarchitecture

Associated topics: chip, circuit, cpu, embedded, mems, msee, rtl logic, semiconductor, smt, system on a chip

Security signal-processing fpu synthesis verilog interrupt vector debugging

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